英文文献翻译,百度谷歌翻译软件就别来了.Abstract— In recent years there have been an increasing number of research groups that have begun to develop multi-chip address-event systems.The communication protocol used to transmit signal

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英文文献翻译,百度谷歌翻译软件就别来了.Abstract— In recent years there have been an increasing number of research groups that have begun to develop multi-chip address-event systems.The communication protocol used to transmit signal
英文文献翻译,百度谷歌翻译软件就别来了.
Abstract— In recent years there have been an increasing number of research groups that have begun to develop multi-chip address-event systems.The communication protocol used to transmit signals between
these systems’components is based on the Address-Event Representation (AER). It is therefore important to have access to robust and reliable AER communication infrastructures for streamlining the systems’development and prototyping stages.
We propose an AER communication infrastructure that can be easily interfaced to workstations or laptops during a prototyping phase, and that can be embedded into compact and low-cost systems in the application phase. The infrastructure proposed uses a novel serial AER interface with flow-control, overcomes many of the drawbacks observed with previous solutions, and can achieve event rates of up to 78.125MHz for 32bit AEs.
I.INTRODUCTION
In recent years a new class of distributed multi-chip neuromorphic systems have emerged, e.g. [1]–[4].Thesesystems are typically composed of one or more neuromorphic sensors (e.g. [5], [6]), tional architectures, often based on networks of silicon neurons and synapses e.g. [7],and potentially of interfaces to robotic actuators for implementing real-time sensory-processing behaving systems.
A.The Address-Event Representation
Multiple researchgroups are developing a wide variety of multi-chip neuromorphic systems in parallel. The characteristic that all these systems have in common is the data representation and the communication protocol used. Each component in these systems can receive and transmit information using the Address-Event Representation (AER) [8], [9] communication protocol. In this representation, input and output signals are real-time digital events that carry analog information in their temporal relationships (inter-spike intervals). Each event is represented by a binary word encoding the address of the sending node. Output signals of sending elements are converted into streams of Address-Events (e.g. using pulse-frequency modulation in the case of silicon neurons), and multiplexed onto an asynchronous digital bus.

英文文献翻译,百度谷歌翻译软件就别来了.Abstract— In recent years there have been an increasing number of research groups that have begun to develop multi-chip address-event systems.The communication protocol used to transmit signal
Abstract— In recent years there have been an increasing number of research groups that have begun to develop multi-chip address-event systems.The communication protocol used to transmit signals between these systems’ components is based on the Address-Event Representation (AER).It is therefore important to have access to robust and reliable AER communication infrastructures for streamlining the systems’ development and prototyping stages.
We propose an AER communication infrastructure that can be easily interfaced to workstations or laptops during a prototyping phase,and that can be embedded into compact and low-cost systems in the application phase.The infrastructure proposed uses a novel serial AER interface with flow-control,overcomes many of the drawbacks observed with previous solutions,and can achieve event rates of up to 78.125MHz for 32bit AEs.
摘要 – 近年来,已涉足研发多芯片AE系统的研究小组日益增多.这些系统元件之间传输信号所使用的通信协议是基于AER.为了提高这些系统在开发和成型阶段的效率,能获得坚实耐用和可靠性强的AER通信基础设备显得尤为重要.
我们推荐一种在其原型开发期间易于连接至工作站或者笔记本电脑,而且在使用期可以嵌入到小巧和低价系统的AER通信基础设备.这基础设备使用的是一种新颖的,可控流量的连续AER接口,它克服了以前的解决方案所遭遇的难题,而且,以32位的AE为例,其事件率可达78.125MHz.
I.\x05INTRODUCTION
In recent years a new class of distributed multi-chip neuromorphic systems have emerged,e.g.[1]–[4].These systems are typically composed of one or more neuromorphic sensors (e.g.[5],[6]),tional architectures,often based on networks of silicon neurons and synapses e.g.[7],and potentially of interfaces to robotic actuators for implementing real-time sensory-processing behaving systems.
1.\x05概论
近年来出现了一种新类的分布式多芯片神经形态系统,例1]–[4].这些系统通常是由一个或多个神经传感器组成,例[5],[6].(此句不全),经常是基于硅神经元与突触网络,例 [7],而且可能连接至机器人驱动器,以执行实时感官行为处理系统.,
A.The Address-Event Representation
Multiple research groups are developing a wide variety of multi-chip neuromorphic systems in parallel.The characteristic that all these systems have in common is the data representation and the communication protocol used.Each component in these systems can receive and transmit information using the Address-Event Representation (AER) [8],[9] communication protocol.In this representation,input and output signals are real-time digital events that carry analog information in their temporal relationships (inter-spike intervals).Each event is represented by a binary word encoding the address of the sending node.Output signals of sending elements are converted into streams of Address-Events ( e.g.using pulse-frequency modulation in the case of silicon neurons),and multiplexed onto an asynchronous digital bus.
A.AER
多个研究小组正在研发多种多样的并联多芯片神经形态系统.这些系统的共同特点是数据的表示方式和使用的通信协议.这些系统的每个元件能够利用AER通信协议[8],[9]来收发信息;所输入或输出的信号都是在它们的时态关系中传送模拟信息的实时数字事件(神经元放电间隔).
每个事件是以一个二进制字把发送地址译为编码来表示.元件发送的输出信号被转换为AE信息流 (例:硅神经元所使用的是脉冲频率调制),然后多路复用至异步数字总线.
【英语牛人团】高难度,要加分哟!

摘要— 近几年,越来越多的研究团队开始develop multi-chip address-event 系统.
和ls的同感那

看到一大段一大段的我都直接放弃。。。就不知道一点点的来。。。看的头晕。

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